Reduced Test Pattern Generation using Reconfigurable Compression Techniques for Testing Soc
نویسندگان
چکیده
منابع مشابه
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Automatic Test Pattern Generation (ATPG) is one of the core problems in testing of digital circuits. ATPG algorithms based on Boolean Satisfiability (SAT) turned out to be very powerful, due to great advances in the performance of satisfiability solvers for propositional logic in the last two decades. SAT-based ATPG clearly outperforms classical approaches especially for hard-to-detect faults. ...
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ژورنال
عنوان ژورنال: International Journal of Electronics and Communication Engineering
سال: 2015
ISSN: 2348-8549
DOI: 10.14445/23488549/ijece-v2i3p120